Date of Award:
Master of Science (MS)
Electrical and Computer Engineering
Jacob H. Gunther
This pro ject summarizes the design and implementation of ﬁeld programmable gate array (FPGA) based digital signal processing (DSP) hardware meant to be used in a software radio system. The ﬁlters and processing were ﬁrst designed in MATLAB and then implemented using very high speed integrated circuit hardware description language (VHDL). Since this hardware is meant for a software radio system, making the hardware ﬂexible was the main design goal. Flexibility in the FPGA design was reached using VHDL generics and generate for loops. The hardware was veriﬁed using MATLAB generated signals as stimulus to the VHDL design and comparing the VHDL output with the corresponding MATLAB calculated signal. Using this veriﬁcation method, the VHDL design was veriﬁed post place and route (PAR) on several diﬀerent Virtex family FPGAs.
Talbot, Jake, "Design and Implementation of Digital Signal Processing Hardware for a Software Radio Reciever" (2008). All Graduate Theses and Dissertations. Paper 265.
Copyright for this work is retained by the student.