Opportunistic Turbo Execution in NTC: Exploiting the Paradigm Shift in Performance Bottlenecks.

Authors

Hu Chen, Utah State UniversityFollow
Dieudonne Manzi, Utah State University
Sanghamitra Roy, Utah State UniversityFollow
Koushik Chakraborty, Utah State UniversityFollow

Document Type

Conference Paper

Journal/Book Title/Conference

DAC '15: Proceedings of the 52nd Annual Design Automation Conference

Publisher

Association for Computing Machinery

Publication Date

6-7-2015

Funder

National Science Foundation

Abstract

In this paper, we investigate an intriguing shifting trend in performance bottlenecks for Near-Threshold Computing (NTC) processors. Our study demonstrates that the traditional memory latency bottleneck is largely superseded by the bottlenecks of Long Latency Datapaths (LLDs) within a processor core. To exploit this paradigm shift, we propose Opportunistic Turbo Execution (OTE). OTE dynamically boosts the performance of LLDs, by several factors, improving both performance and energy efficiency in an NTC core. Using a comprehensive circuit-architectural analysis, we demonstrate a 42.2% improvement in energy efficiency over a recently proposed technique, across a range of benchmarks.

Comments

© 2015. This is the author's version of the work. It is posted here for your personal use. Not for redistribution. The definitive Version of Record was published in DAC '15: Proceedings of the 52nd Annual Design Automation Conference, https://doi.org/10.1145/2744769.2744881

Recommended Citation

Hu Chen, Dieudonne Manzi, Sanghamitra Roy and Koushik Chakraborty, Opportunistic Turbo Execution in NTC: Exploiting the Paradigm Shift in Performance Bottlenecks. IEEE/ACM Design Automation Conference (DAC), Article No. 63, June 2015, San Francisco, CA.