Document Type

Conference Paper

Journal/Book Title/Conference

DAC '13: Proceedings of the 50th Annual Design Automation Conference


Association for Computing Machinery

Publication Date



National Science Foundation


Early prediction of an upcoming timing violation presents a tremendous opportunity to mask the performance overhead of tolerating these faults. In this paper, we explore several techniques for optimizing instruction scheduling in an Out-of-Order pipeline, exploiting this new perspective in robust system design. Compared to recently proposed stall based techniques for tolerating predictabletiming violations, we demonstrate a massive reduction in performance overhead, while supporting correct execution in faulty environments (64-97% across different benchmarks). Copyright © 2013 ACM.


© 2013. This is the author's version of the work. It is posted here for your personal use. Not for redistribution. The definitive Version of Record was published in DAC '13: Proceedings of the 50th Annual Design Automation Conference,