Scanning Electron Microscopy


Electron beam testing of integrated circuits (IC) is currently based on the electron beam induced conductivity in insulators to short the passivation layer and to enable a voltage measurement at covered conductor tracks. However, applying this technique to passivated MOS devices causes severe radiation damage, which was at first explained by primary electrons penetrating into the deep-lying gate oxide. Nondestructive electron beam testing was expected by using low electron energies that do not allow the primary electrons to reach into the gate oxide.

Therefore here the influence of nonpenetrating electron irradiation on the characteristics of passivated NMOS transistors has been studied. The experiments demonstrate that significant damage is caused even when primary electrons do not reach into the gate oxide. This can be explained by secondary X-rays, generated by the primary electrons in the upper layers, that then penetrate into the gate oxide. Radiation damage increases with irradiation dose, primary energy and with decreasing gate size. Though using the lowest primary electron energy possible to build up the necessary conductive channel, even low irradiation doses alter the devices drastically. Only by blanking off the high energy electron beam at gate oxide areas during the scan, i.e. by application of the window scan mode, is a nearly nondestructive testing of passivated MOS devices via the electron beam induced conductivity made possible. Another possibility to decrease radiation damage is the reduction of primary electron energy to about 1 keV. Then electron beam testing is no longer based on the physics of electron beam induced conductivity, but on the capacitive coupling voltage contrast.

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