Date of Award:
5-1974
Document Type:
Dissertation
Degree Name:
Doctor of Philosophy (PhD)
Department:
Electrical and Computer Engineering
Department name when degree awarded
Electrical Engineering
Advisor/Chair:
Ronald L. Thurgood
Abstract
Some techniques are presented to permit the implementation of asynchronous sequential circuits using standard flip-flops. An algorithm is presented for the RS flip-flop, and it is shown that any flow table may be realized using the algorithm (the flow table is assumed to be realizable using standard logic gates). The approach is shown to be directly applicable to synchronous circuits, and transition flip-flops (JK, D, and T) are analyzed using the ideas developed. Constraints are derived for the flow tables to meet to be realizable using transition flip-flops in asynchronous situations, and upper and lower bounds on the number of transition flip-flops required to implement a given flow table are stated.
Checksum
23bfcd2cd1672f0aeab70f83123c3414
Recommended Citation
Cox, David Franklin, "Asynchronous Logic Design with Flip-Flop Constraints" (1974). All Graduate Theses and Dissertations. 6956.
https://digitalcommons.usu.edu/etd/6956
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