Date of Award:
5-2008
Document Type:
Thesis
Degree Name:
Master of Science (MS)
Department:
Electrical and Computer Engineering
Advisor/Chair:
Brandon Eames
Abstract
Constraint satisfaction and optimization techniques are commonly employed in scheduling problems, industrial manufacturing, and automation processes. Constraint Satisfaction Problem (CSP) also finds use in the design, synthesis, and optimization of embedded systems. In recent years online constraint solving techniques have been employed in embedded systems for dynamic system adaptation. In embedded systems, online constraint solving techniques are primarily used as on-board control software. Using CSP techniques for scheduling algorithms provides intelligent scheduling. This thesis discusses the architecture of an embedded, parallel finite-domain constraint solver for performing online constraint satisfaction. By modeling the scheduling problem as a CSP problem, the embedded system becomes adaptable to dynamic changes in the environment. The features of this solver are that it is implemented in a platform with multiple soft-core processors with distributed memory architecture. A tool is also developed that automates the partitioning of the given application and configures the underlying framework.
Checksum
f266aa9aee457e43fed9b3d3fee5b590
Recommended Citation
Subramanian, Prasad, "A Field Programmable Gate Array Based Finite-Domain Constraint Solver" (2008). All Graduate Theses and Dissertations. 99.
https://digitalcommons.usu.edu/etd/99
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