Semiconductor device failure analysis using the scanning electron microscope (SEM) has become a standard component of integrated circuit fabrication. Improvements in SEM capabilities and in digital imaging and processing have advanced standard acquisition modes and have promoted new failure analysis methods. The physical basis of various data acquisition modes, both standard and new, and their implementation on a computer controlled SEM image acquisition/processing system are discussed, emphasizing the advantages of each method. Design considerations for an integrated, online failure analysis system are also described. Recent developments in the integration of the information provided by electron beam analysis, conventional integrated circuit (IC) testing, computer-aided design (CAD), and device parameter testing into a single system promise to provide powerful future tools for failure analysis.
Cole, E. I. Jr.; Bagnell, C. R. Jr.; Davies, B. G.; Neacsu, A. M.; Oxford, W. V.; and Propst, R. H.
"Advanced Scanning Electron Microscopy Methods and Applications to Integrated Circuit Failure Analysis,"
Scanning Microscopy: Vol. 2
, Article 14.
Available at: https://digitalcommons.usu.edu/microscopy/vol2/iss1/14