Date of Award:
8-2012
Document Type:
Thesis
Degree Name:
Master of Science (MS)
Department:
Electrical and Computer Engineering
Committee Chair(s)
Koushik Chakraborty
Committee
Koushik Chakraborty
Committee
Sanghamitra Roy
Committee
Reyhan Baktur
Abstract
Network-on-chips (NoCs) are one of the most scalable mediums to interconnect different processors in a multi-processor system. The processors are connected to routers via network interfaces and the routers are connected to each other through links. A routing algorithm is implemented inside each router that decides the path that a packet must take to reach the destination processor from the source. If a path is heavily utilized, the links and routers comprising the path start to age, and therefore can become faulty with time. In order to avoid this situation, the routing logic must be able to distribute the packets evenly across the network so as to reduce the utilization of heavily stressed routers and links. In this work, two such aging-aware routing algorithms are proposed that reduce the aging induced power and performance overheads and also avoid stress on the network components. These algorithms can be broadly classified as dynamic (adaptive routing) and static (oblivious routing) solutions.
Checksum
79b5a6b527f4d9604f7461e35366cf40
Recommended Citation
Bhardwaj, Kshitij, "Aging-Aware Routing Algorithms for Network-on-Chips" (2012). All Graduate Theses and Dissertations, Spring 1920 to Summer 2023. 1319.
https://digitalcommons.usu.edu/etd/1319
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