Date of Award:

5-2008

Document Type:

Thesis

Degree Name:

Master of Science (MS)

Department:

Electrical and Computer Engineering

Committee Chair(s)

Jacob H. Gunther

Committee

Jacob H. Gunther

Committee

Todd K. Moon

Committee

Aravind Dasu

Abstract

This project summarizes the design and implementation of field programmable gate array (FPGA) based digital signal processing (DSP) hardware meant to be used in a software radio system. The filters and processing were first designed in MATLAB and then implemented using very high speed integrated circuit hardware description language (VHDL). Since this hardware is meant for a software radio system, making the hardware flexible was the main design goal. Flexibility in the FPGA design was reached using VHDL generics and generate for loops. The hardware was verified using MATLAB generated signals as stimulus to the VHDL design and comparing the VHDL output with the corresponding MATLAB calculated signal. Using this verification method, the VHDL design was verified post place and route (PAR) on several different Virtex family FPGAs.

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