Date of Award
5-2011
Degree Type
Report
Degree Name
Master of Science (MS)
Department
Electrical and Computer Engineering
Committee Chair(s)
Jacob Gunther
Committee
Jacob Gunther
Committee
Scott Budge
Committee
Wei Ren
Abstract
Supporting a variety of communication protocols has typically required extensive hard- ware and Input/Output (I/O) interfaces targeting each protocol specifically. Recent designs in the past ten years have created more dynamic approaches by using Field Programmable Gate Arrays (FPGAs) and embedded hardware to implement or simulate previous hardware I/O designs. With the constant increase in FPGA and embedded technologies the capabilities of dynamic implementations have expanded. This report addresses the design of an up-to-date reconfigurable multi-faceted embedded device targeting recent technological advances in FPGAs.
Recommended Citation
Dunkley, Richard, "Development of a Reconfigurable Multi-Faceted Communications Device Using Partial Dynamic Reconfiguration" (2011). All Graduate Plan B and other Reports, Spring 1920 to Spring 2023. 9.
https://digitalcommons.usu.edu/gradreports/9
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Comments
This work made publicly available electronically on May 13, 2011.