Session
Session XI: Advanced Technologies 3
Abstract
The LEON 3FT Controller Board (LCB) is part of a NASA experiment and designed to provide control and monitoring capability of up to four commercial high performance DSP processor cards. The experiment is part of the Materials on the International Space Station Experiment (MISSE) program and is set to launch on the Space Shuttle in the November 2009 timeframe. The primary goal of this experiment is to assess in a space environment the effectiveness of radiation mitigation strategies on a commercial DSP processor. At the heart of the LCB is the LEON 3FT microprocessor. The processor is the brains of the entire system, controlling which board gets powered on, as well as monitoring analog channels and watchdogs from each DSP board. These processes are facilitated by the use of a UT6325 RadTol Eclipse FPGA and a set of registers. The registers are memory mapped into the I/O space of the LEON 3FT. Memory resources on the LCB are in the form of 4MB of EDAC protected SRAM as well as 4MB of NVRAM. An RS-485 interface is used for ground communication and can also be used for software uploads. The power circuits include an autonomous over-current trip that is asserted when a DSP board exceeds the 2 amp load. Communication between the LCB and the DSP cards is achieved by the implementation of an 8-bit address/data bus and board select signals to indicate which of the four cards the LCB is accessing. Again, the LEON 3FT uses an FPGA register to initiate these transactions. An LVDS serial interface is also provided, though it is not being used for the current MISSE mission. The rapid development from concept to flight delivery of the LCB posed some interesting and challenging requirements on the design team participants. The author will outline in more detail these challenges, as well as greater detail on the functionality and performance of the LCB.
Presentation Slides
Rapid Development of Experimental LEON 3FT Controller Board
The LEON 3FT Controller Board (LCB) is part of a NASA experiment and designed to provide control and monitoring capability of up to four commercial high performance DSP processor cards. The experiment is part of the Materials on the International Space Station Experiment (MISSE) program and is set to launch on the Space Shuttle in the November 2009 timeframe. The primary goal of this experiment is to assess in a space environment the effectiveness of radiation mitigation strategies on a commercial DSP processor. At the heart of the LCB is the LEON 3FT microprocessor. The processor is the brains of the entire system, controlling which board gets powered on, as well as monitoring analog channels and watchdogs from each DSP board. These processes are facilitated by the use of a UT6325 RadTol Eclipse FPGA and a set of registers. The registers are memory mapped into the I/O space of the LEON 3FT. Memory resources on the LCB are in the form of 4MB of EDAC protected SRAM as well as 4MB of NVRAM. An RS-485 interface is used for ground communication and can also be used for software uploads. The power circuits include an autonomous over-current trip that is asserted when a DSP board exceeds the 2 amp load. Communication between the LCB and the DSP cards is achieved by the implementation of an 8-bit address/data bus and board select signals to indicate which of the four cards the LCB is accessing. Again, the LEON 3FT uses an FPGA register to initiate these transactions. An LVDS serial interface is also provided, though it is not being used for the current MISSE mission. The rapid development from concept to flight delivery of the LCB posed some interesting and challenging requirements on the design team participants. The author will outline in more detail these challenges, as well as greater detail on the functionality and performance of the LCB.
