Session
Session II: C&DH
Abstract
We describe the implementation of a low-power, radiation-tolerant field programmable gate array (FPGA) satellite control system targeted for CubeSats. FPGA based control systems have advantages over microprocessor systems in that they provide parallel and real time processing and can more easily be radiation hardened. They can provide larger computational capability at low powers than a microprocessor. A major drawback has been the inflexibility and difficulty in programming FPGAs relative to the simplicity of using a microprocessor and a real time operating system. Another drawback has been the difficulty in testing the FPGA design without complete hardware. Recently tool chains have been developed by Mathworks that can auto code FPGAs directly from Simulink models. This development process can mitigate difficulties in developing a fully FPGA based satellite control system. Simulink can be used to verify the functionality and performance of the satellite control system as a model of the high level algorithms. The Hardware Description Language (HDL) for the FPGA can be auto generated from the Simulink model. The Simulink model can then be used in a hardware in the loop verification of the FPGA performance.
We have used Simulink to model control systems for two different spacecraft subsystems. The first being an Attitude Determination and Control System (ADCS) and the second being a controller for a science payload. The Simulink model of the ADCS allows for testing of the algorithms in a way we can track what is happening form input to output. This allows us to thoroughly understand the implantations of the algorithms and test how data will be transferred between throughout the ADCS using flight commands. These models have been auto coded to HDL and then placed on the FPGAs. We are currently proceeding to a hardware in loop with model to verify that the hardware implementation matches the model. This has allowed the use Simulink as a kind of testing interface for the FPGAs. With the science payload we have done the same kind of hardware in the loop testing with the advantage that the direct connection with Matlab simplifies the calibration process of the instrument. Data from the payload is sent directly back to Simulink which is then analyzed in real-time. We report on the advantages and disadvantages of using FPGA based state-machine verses microprocessor controllers and how this is impacted by modern development tools.
Model Based Design and Auto coding of an FPGA Based Satellite Control System
We describe the implementation of a low-power, radiation-tolerant field programmable gate array (FPGA) satellite control system targeted for CubeSats. FPGA based control systems have advantages over microprocessor systems in that they provide parallel and real time processing and can more easily be radiation hardened. They can provide larger computational capability at low powers than a microprocessor. A major drawback has been the inflexibility and difficulty in programming FPGAs relative to the simplicity of using a microprocessor and a real time operating system. Another drawback has been the difficulty in testing the FPGA design without complete hardware. Recently tool chains have been developed by Mathworks that can auto code FPGAs directly from Simulink models. This development process can mitigate difficulties in developing a fully FPGA based satellite control system. Simulink can be used to verify the functionality and performance of the satellite control system as a model of the high level algorithms. The Hardware Description Language (HDL) for the FPGA can be auto generated from the Simulink model. The Simulink model can then be used in a hardware in the loop verification of the FPGA performance.
We have used Simulink to model control systems for two different spacecraft subsystems. The first being an Attitude Determination and Control System (ADCS) and the second being a controller for a science payload. The Simulink model of the ADCS allows for testing of the algorithms in a way we can track what is happening form input to output. This allows us to thoroughly understand the implantations of the algorithms and test how data will be transferred between throughout the ADCS using flight commands. These models have been auto coded to HDL and then placed on the FPGAs. We are currently proceeding to a hardware in loop with model to verify that the hardware implementation matches the model. This has allowed the use Simulink as a kind of testing interface for the FPGAs. With the science payload we have done the same kind of hardware in the loop testing with the advantage that the direct connection with Matlab simplifies the calibration process of the instrument. Data from the payload is sent directly back to Simulink which is then analyzed in real-time. We report on the advantages and disadvantages of using FPGA based state-machine verses microprocessor controllers and how this is impacted by modern development tools.
