IcoNoClast: Tackling Voltage Noise in the NoC Power Supply Through Flow-Control and Routing Algorithms
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Institute of Electrical and Electronics Engineers
National Science Foundation
Power supply noise (PSN) is a growing concern in modern multiprocessor system-on-chips (MPSoCs). The advent of new architectures, such as the network-on-chip (NoC), the standard for on-chip communication in MPSoCs, has given rise to new challenges in maintaining reliable and energy-efficient operation. The growing NoC power footprint, increase in the transistor current, and high switching speed of the logic devices exacerbate the peak PSN in the NoC power delivery network (PDN). Hence, preserving power supply integrity in the NoC PDN is critical. In this paper, we propose IcoNoClast, a collection of a novel flow-control protocol (PAF) and an adaptive routing algorithm (PSN-Aware routing), to mitigate the PSN in NoCs. Our best scheme achieves 15% and 12% improvements in the regional peak PSN and energy efficiency across a range of PARSEC benchmarks, with a 4.1% performance overhead and marginal area and power footprints.
Prabal Basu, Rajesh JayashankaraShridevi, Koushik Chakraborty and Sanghamitra Roy, IcoNoClast: Tackling Voltage Noise in the NoC Power Supply Through Flow-Control and Routing Algorithms, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Volume 25, pp. 2035-2044, Issue 7, July 2017.