Low-Level Placement and Routing Changes to Increase SRAM FPGA Reliability
Session 1
Description
Mitigation techniques, such as TMR, are used to reduce the negative effects of radiation on FPGAs deployed in space environments. While these techniques increase the robustness of the device, there is still room for improvement in the range of 100 to 1,000x. These improvements can be realized through the low-level implementation of the placement and routing on the device. This work has implemented a wide variety of techniques to realize these gains, achieving an overall improvement of 45,653x through fault-injection testing and an improvement of 368x in radiation testing.
Low-Level Placement and Routing Changes to Increase SRAM FPGA Reliability
Orbital ATK Conference Center
Mitigation techniques, such as TMR, are used to reduce the negative effects of radiation on FPGAs deployed in space environments. While these techniques increase the robustness of the device, there is still room for improvement in the range of 100 to 1,000x. These improvements can be realized through the low-level implementation of the placement and routing on the device. This work has implemented a wide variety of techniques to realize these gains, achieving an overall improvement of 45,653x through fault-injection testing and an improvement of 368x in radiation testing.