An ATM-Based Intelligent Optical Backplane Using CMOS-SEED Smart Pixel Arrays and Free- Space Optical Interconnect Modules

Authors

Dominic J. Goodwill, University of Colorado at Boulder
Kent E. Devenport, University of Colorado at Boulder
Harvard Scott Hinton, Utah State UniversityFollow

Document Type

Article

Journal/Book Title/Conference

IEEE Journal on Selected Topics in Quantum Electronics

Volume

2

Issue

1

Publisher

IEEE

Publication Date

1996

First Page

85

Last Page

96

Abstract

The architecture, smart pixel array chip design, and optical design of an intelligent free-space digital optical backplane for ATM switching are presented. The smart pixel chip uses reflective SEED (self-electrooptic effect device) optical modulators and detectors flip-chip bonded to CMOS circuitry. This chip is one of the most complex designs ever reported in this technology, and it operates at a simulated backplane clock rate of 125 MHz. The low-loss optical system employs f/4 diffractive minilenses and microlenses to interconnect clusters of smart pixels, and it is shown to allow 2060 connections per chip if 1-cm2 -sized smart pixel chips are used. This gives a predicted bisection bandwidth of around 1 Tb/s across a 10-in circuit board edge for a full-sized system.

Comments

Originally published by IEEE. Publisher's PDF can be accessed through the IEEE Journal of Selected Topics in Quantum Electronics.

Recommended Citation

D. J. Goodwill, K. D. Devenport, and H. S. Hinton, "An ATM-Based Intelligent Optical Backplane Using CMOS-SEED Smart Pixel Arrays and Free- Space Optical Interconnect Modules," IEEE Journal on Selected Topics in Quantum Electronics. Vol. 2, No.1, April 1996, pp. 85-96.