Date of Award:
8-2019
Document Type:
Dissertation
Degree Name:
Doctor of Philosophy (PhD)
Department:
Electrical and Computer Engineering
Committee Chair(s)
Koushik Chakraborty
Committee
Koushik Chakraborty
Committee
Sanghamitra Roy
Committee
Jacob Gunther
Committee
Reyhan Baktur
Committee
Paul Barr
Abstract
Computer hardware researchers have perennially focussed on improving the performance of computers while stipulating the energy consumption under a strict budget. While several innovations over the years have led to high performance and energy efficient computers, more challenges have also emerged as a fallout. For example, smaller transistor devices in modern multi-core systems are afflicted with several reliability and security concerns, which were inconceivable even a decade ago. Tackling these bottlenecks happens to negatively impact the power and performance of the computers. This dissertation explores novel techniques to gracefully solve some of the pressing challenges of the modern computer design. Specifically, the proposed techniques improve the reliability of on-chip communication fabric under a high power supply noise, increase the energy-efficiency of low-power graphics processing units, and demonstrate an unprecedented security loophole of the low-power computing paradigm through rigorous hardware-based experiments.
Checksum
98be4ffa06c26f20a3d3d807e8594c97
Recommended Citation
Basu, Prabal, "Toward Reliable, Secure, and Energy-Efficient Multi-Core System Design" (2019). All Graduate Theses and Dissertations, Spring 1920 to Summer 2023. 7517.
https://digitalcommons.usu.edu/etd/7517
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