Date of Award:
8-2021
Document Type:
Dissertation
Degree Name:
Doctor of Philosophy (PhD)
Department:
Electrical and Computer Engineering
Committee Chair(s)
Sanghamitra Roy
Committee
Sanghamitra Roy
Committee
Koushik Chakraborty
Committee
Jacob Gunther
Committee
Reyhan Baktur
Committee
Vicki H. Allan
Abstract
As the economies around the world are aligning more towards usage of computing systems, the global energy demand for computing is increasing rapidly. Additionally, the boom in AI based applications and services has already invited the pervasion of specialized computing hardware architectures for AI (accelerators). A big chunk of research in the industry and academia is being focused on providing energy efficiency to all kinds of power hungry computing architectures. This dissertation adds to these efforts.
Aggressive voltage underscaling of chips is one the effective low power paradigms of providing energy efficiency. This dissertation identifies and deals with the reliability and performance problems associated with this paradigm and innovates novel energy efficient approaches. Specifically, the properties of a low power security primitive have been improved and, higher performance has been unlocked in an AI accelerator (Google TPU) in an aggressively voltage underscaled environment. And, novel power saving opportunities have been unlocked by characterizing the usage pattern of a baseline TPU with rigorous mathematical analysis.
Checksum
154f24cf8d69b5adac713b5d109b7220
Recommended Citation
Pandey, Pramesh, "Embracing Low-Power Systems with Improvement in Security and Energy-Efficiency" (2021). All Graduate Theses and Dissertations, Spring 1920 to Summer 2023. 8250.
https://digitalcommons.usu.edu/etd/8250
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