Date of Award:

12-2025

Document Type:

Thesis

Degree Name:

Master of Science (MS)

Department:

Electrical and Computer Engineering

Committee Chair(s)

Charles Swenson

Committee

Charles Swenson

Committee

Jonathan Phillips

Committee

Don Cripps

Abstract

Modern small spacecraft rely on powerful yet efficient onboard compute devices to process data from sensors in real-time due to tight power and volume constraints. This work explores a new compute device system built from PolarFire Field-Programmable Gate Arrays (FPGAs), which are power-efficient, reprogrammable chips well-suited for space applications. The system connects via a central controller FPGA with one or multiple companion processing FPGAs, allowing sensor data to be quickly received and shared across the network. Standardized data formats and interfaces increase compatibility with spacecraft computers. By simplifying data handling and using high-speed communication links, this architecture makes it easier to integrate advanced algorithms, such as machine learning, directly onboard spacecraft. This approach supports faster, more efficient decision-making in space and reduces reliance on ground-based processing, which is especially valuable for missions with limited communication bandwidth or time-sensitive operations.

Creative Commons License

Creative Commons Attribution 4.0 License
This work is licensed under a Creative Commons Attribution 4.0 License.

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