Time-to-Digital Conversion in the Lattice CertusPro FPGA for the CAPE Instrument

Authors

• Zakk B. Rhodes, Utah State University Space Dynamics LaboratoryFollow
• James Cook, Utah State University Space Dynamics Laboratory
• Cameron Weston, Utah State University Space Dynamics Laboratory
• Daniel J. Gershman, NASA Goddard Space Flight CenterFollow

Document Type

Article

Publisher

Utah State University Space Dynamics Laboratory

Publication Date

2025

First Page

1

Last Page

4

Abstract

A time-to-digital conversion (TDC) algorithm is implemented in a Lattice CertusPro FPGA to measure time differences between two incident pulses for science data acquisition in the CAPE instrument on NASA’s GDC mission. CertusPro provides sub-100 picosecond resolution with nearly linear results which is discussed with its other unique characteristics. Performance measurements and variation in timing due to parameters such as core voltage and temperature are presented.

Recommended Citation

Rhodes, Zakk B.; Cook, James; Weston, Cameron; and Gershman, Daniel J., "Time-to-Digital Conversion in the Lattice CertusPro FPGA for the CAPE Instrument" (2025). Space Dynamics Laboratory Publications. Paper 389.
https://digitalcommons.usu.edu/sdl_pubs/389