Session
Technical Sesson XI: Subsystems II
Abstract
The RH-3000 program has developed a rad-hard space qualified 32-bit MIPS R-3000 compatible RISC processor under Naval Research Lab sponsorship. In addition, under IR&D, Harris has developed RHC-3000 for embedded control applications where low power and radiation tolerance are primary concerns. The development program leverages heavily from the commercial development of the MIPS R-3000. The commercial R-3000 has a large installed user base and several foundry partners are currently producing a wide variety of R- 3000 derivative products. One of the MIPS derivative products, the LR33000 from LSI Logic, was used as the basis for the design of the RH-3000 and RHC-3000 chipset. The RH-3000 chipset consists of three core chips and two support chips. The core chips include the CPU, which is the R-3000 integer unit and the FPA/MD chip pair, which performs the R-3010 floating point functions. The two support chips contain all the support functions required for fault tolerance support, real-time support, memory management, timers and other functions. The Harris development effort had first passed silicon success in June, 1992 with the tmt rad-hard 32-bit RH-3000 CPU chip. The CPU device is 30 kgates, has a 503 mil by 502 mil die size and is fabricated at Harris Semiconductor on the rad-hard CMOS Silicon on Sapphire (SOS) process. The CPU device successfully passed testing against 150,000 test vectors derived directly on the LSI/MIPS test suite and has been operational as a single board computer running C and Ada code for the past two years. In addition Harris has a number of standard module designs available for a variety of space applications.
Radiation Hardened Microprocessor for Small Satellites, Payloads and Instruments
The RH-3000 program has developed a rad-hard space qualified 32-bit MIPS R-3000 compatible RISC processor under Naval Research Lab sponsorship. In addition, under IR&D, Harris has developed RHC-3000 for embedded control applications where low power and radiation tolerance are primary concerns. The development program leverages heavily from the commercial development of the MIPS R-3000. The commercial R-3000 has a large installed user base and several foundry partners are currently producing a wide variety of R- 3000 derivative products. One of the MIPS derivative products, the LR33000 from LSI Logic, was used as the basis for the design of the RH-3000 and RHC-3000 chipset. The RH-3000 chipset consists of three core chips and two support chips. The core chips include the CPU, which is the R-3000 integer unit and the FPA/MD chip pair, which performs the R-3010 floating point functions. The two support chips contain all the support functions required for fault tolerance support, real-time support, memory management, timers and other functions. The Harris development effort had first passed silicon success in June, 1992 with the tmt rad-hard 32-bit RH-3000 CPU chip. The CPU device is 30 kgates, has a 503 mil by 502 mil die size and is fabricated at Harris Semiconductor on the rad-hard CMOS Silicon on Sapphire (SOS) process. The CPU device successfully passed testing against 150,000 test vectors derived directly on the LSI/MIPS test suite and has been operational as a single board computer running C and Ada code for the past two years. In addition Harris has a number of standard module designs available for a variety of space applications.
