Session
Technical Session VI: Advanced Technologies & Subsystems, Components & Sensors (I)
Abstract
The work presented in this paper is part of a Surrey Space Centre research project that aims to reduce the size of an on-board computer to a single chip facilitating further miniaturisation of small satellites. The paper is concerned with a communication system, specifically designed to meet the needs of a single-chip onboard computer - a simplified yet reliable and automated standalone alternative software implementation of the Consultative Committee of Space Data Systems (CCSDS) protocol communicating with a standard universal asynchronous receiver-transmitter (UART) peripheral. Details of the design and implementation stages of a CCSDS package coded in the language C are given. A thin hardware layer is described which translates the asynchronous UART stream into a CCSDS compliant synchronous stream. Synthesis results targeted at Actel FPGAs are presented taking into account single event upset tolerant coding styles.
A CCSDS Software System for a Single-Chip On-Board Computer of a Small Satellite
The work presented in this paper is part of a Surrey Space Centre research project that aims to reduce the size of an on-board computer to a single chip facilitating further miniaturisation of small satellites. The paper is concerned with a communication system, specifically designed to meet the needs of a single-chip onboard computer - a simplified yet reliable and automated standalone alternative software implementation of the Consultative Committee of Space Data Systems (CCSDS) protocol communicating with a standard universal asynchronous receiver-transmitter (UART) peripheral. Details of the design and implementation stages of a CCSDS package coded in the language C are given. A thin hardware layer is described which translates the asynchronous UART stream into a CCSDS compliant synchronous stream. Synthesis results targeted at Actel FPGAs are presented taking into account single event upset tolerant coding styles.
