Session
Swifty Session 2: Command & Data Handling
Location
Utah State University, Logan, UT
Abstract
On-Board Computers (OBCs) for Small-satellite missions are typically required to be designed using industrial grade Commercial-of-the-shelf (COTS) components due to budget constraints and short mission duration. The OBC must provide a variety of interfaces due to the diverse nature of COTS subsystems having different interface definitions. Traditional OBC designs with standard microcontrollers have fixed interfaces that require modification of the motherboard circuit/layout when the external interfaces require changes. Thus, a possible solution is to have an FPGA in-addition to the micro-controller thereby providing a configurable interface capability. System-on-Chip (SoC) devices that integrate a microcontroller with FPGA fabric provide an ideal solution for reducing the development time. Additionally, the limited availability of power in small satellite missions makes it essential to use power-efficient devices. Furthermore, single event upsets (SEUs) and single event latch-up (SELs) are a major problem for OBCs designed for Low Earth Orbit (LEO) small-satellite missions. Flash memory-based FPGAs provide the benefit of low power consumption and they are more also fault-tolerant due to their intrinsic robustness against induced single event upsets compared to SRAM-based FPGAs. This article describes the OBC developed using the flash-based Microsemi SmartFusion2 SoC FPGA as its key component, for the INSPIRESat-1 and INSPIRESat-2 small-satellite missions. The OBC is designed in two form factors one with 13cm x 10cm dimensions for INSPIRESat-1 and the other with 10cm x 10cm dimensions for INSPIRESat-2. The OBC uses a COTS System-on-Module (SoM) developed by Emcraft containing the SmartFusion2 SoC, which is mounted on a custom-designed motherboard containing other peripherals including flash memory, SD Cards, and an external watchdog timer. The OBC has a total power consumption of approximately 1 W, in the final flight configuration. The article here describes the architecture of the OBC in detail, the key features of which include multiple on-board memories, a multi-level reset methodology, and reconfigurable input/output interfaces. The article concludes with the details of comprehensive performance tests conducted on the INSPIRESat-1 OBC, which has qualified TRL-8 (technology readiness level) status after completing required environmental tests such as the Thermal Vacuum Test (TVAC) and vibration test as a part of the integrated satellite. INSPIRESat-2 was launched in January 2021 and due to the successful working of the OBC in fight it has achieved TRL-9 status through this mission. The OBC developed for INSPIRESat-1 is planned to achieve TRL-9 status after its launch in the third quarter of 2021.
Development of a Power-Efficient, Low Cost, and Flash FPGA Based On-Board Computer for Small-Satellites
Utah State University, Logan, UT
On-Board Computers (OBCs) for Small-satellite missions are typically required to be designed using industrial grade Commercial-of-the-shelf (COTS) components due to budget constraints and short mission duration. The OBC must provide a variety of interfaces due to the diverse nature of COTS subsystems having different interface definitions. Traditional OBC designs with standard microcontrollers have fixed interfaces that require modification of the motherboard circuit/layout when the external interfaces require changes. Thus, a possible solution is to have an FPGA in-addition to the micro-controller thereby providing a configurable interface capability. System-on-Chip (SoC) devices that integrate a microcontroller with FPGA fabric provide an ideal solution for reducing the development time. Additionally, the limited availability of power in small satellite missions makes it essential to use power-efficient devices. Furthermore, single event upsets (SEUs) and single event latch-up (SELs) are a major problem for OBCs designed for Low Earth Orbit (LEO) small-satellite missions. Flash memory-based FPGAs provide the benefit of low power consumption and they are more also fault-tolerant due to their intrinsic robustness against induced single event upsets compared to SRAM-based FPGAs. This article describes the OBC developed using the flash-based Microsemi SmartFusion2 SoC FPGA as its key component, for the INSPIRESat-1 and INSPIRESat-2 small-satellite missions. The OBC is designed in two form factors one with 13cm x 10cm dimensions for INSPIRESat-1 and the other with 10cm x 10cm dimensions for INSPIRESat-2. The OBC uses a COTS System-on-Module (SoM) developed by Emcraft containing the SmartFusion2 SoC, which is mounted on a custom-designed motherboard containing other peripherals including flash memory, SD Cards, and an external watchdog timer. The OBC has a total power consumption of approximately 1 W, in the final flight configuration. The article here describes the architecture of the OBC in detail, the key features of which include multiple on-board memories, a multi-level reset methodology, and reconfigurable input/output interfaces. The article concludes with the details of comprehensive performance tests conducted on the INSPIRESat-1 OBC, which has qualified TRL-8 (technology readiness level) status after completing required environmental tests such as the Thermal Vacuum Test (TVAC) and vibration test as a part of the integrated satellite. INSPIRESat-2 was launched in January 2021 and due to the successful working of the OBC in fight it has achieved TRL-9 status through this mission. The OBC developed for INSPIRESat-1 is planned to achieve TRL-9 status after its launch in the third quarter of 2021.
