Session

Technical Poster Session 3

Location

Utah State University, Logan, UT

Abstract

RC64 is a rad-hard manycore DSP combining 64 VLIW/SIMD DSP cores, lock-free shared memory, a hardware scheduler and a task-based programming model. The hardware scheduler enables fast scheduling and allocation of fine grain tasks to all cores. Parallel programming is based on Tasks.

Additional Files
SSC22-P3-11.pdf (640 kB)
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Aug 10th, 9:45 AM

Task Oriented Programming for the RC64 Manycore DSP

Utah State University, Logan, UT

RC64 is a rad-hard manycore DSP combining 64 VLIW/SIMD DSP cores, lock-free shared memory, a hardware scheduler and a task-based programming model. The hardware scheduler enables fast scheduling and allocation of fine grain tasks to all cores. Parallel programming is based on Tasks.