Session
Poster Session 1
Location
Salt Palace Convention Center, Salt Lake City, UT
Abstract
This paper presents the design, development, and validation of a custom backplane interface board for GuaraniSat-2, Paraguay's second nanosatellite. GuaraniSat-2 is a 3U CubeSat developed through a collaborative effort led by the Paraguayan Space Agency (AEP) and SpaceLab, with the active participation of stakeholders such as the Polytechnic and Engineering Faculties of the National University of Asunción (UNA), Catholic University of Asunción (UCA), the LIESE lab at the National Autonomous University of Mexico (UNAM), NASA's Jet Propulsion Laboratory (JPL), and Astradyne, an Italian startup spun off from the Polytechnic University of Bari (Politecnico di Bari). The backplane board functions as both a mechanical backbone and an electrical hub, enabling robust communication and efficient power distribution across CubeSat subsystems. Based on the Kyushu Institute of Technology (Kyutech) Standard Bus architecture, the system employs a six-layer Printed Circuit Board (PCB) integrating USB/UART multiplexing, I2C isolation, GPS modules, analog-to-digital converters (ADCs) for sun sensor data acquisition, and an NXP i.MX RT1060 microcontroller. This microcontroller replaces programmable logic devices (PLDs) used in earlier designs, streamlining integration and enhancing functionality. Comprehensive integration and stress testing on a custom-built testbed confirmed the board’s electrical and mechanical stability, validating its readiness for environmental qualification. The backplane significantly reduces cable complexity, improves subsystem modularity, and provides a scalable foundation for future CubeSat missions.
Document Type
Event
Development of a Scalable Electrical and Mechanical Backplane for the GuaraniSat-2 CubeSat Mission
Salt Palace Convention Center, Salt Lake City, UT
This paper presents the design, development, and validation of a custom backplane interface board for GuaraniSat-2, Paraguay's second nanosatellite. GuaraniSat-2 is a 3U CubeSat developed through a collaborative effort led by the Paraguayan Space Agency (AEP) and SpaceLab, with the active participation of stakeholders such as the Polytechnic and Engineering Faculties of the National University of Asunción (UNA), Catholic University of Asunción (UCA), the LIESE lab at the National Autonomous University of Mexico (UNAM), NASA's Jet Propulsion Laboratory (JPL), and Astradyne, an Italian startup spun off from the Polytechnic University of Bari (Politecnico di Bari). The backplane board functions as both a mechanical backbone and an electrical hub, enabling robust communication and efficient power distribution across CubeSat subsystems. Based on the Kyushu Institute of Technology (Kyutech) Standard Bus architecture, the system employs a six-layer Printed Circuit Board (PCB) integrating USB/UART multiplexing, I2C isolation, GPS modules, analog-to-digital converters (ADCs) for sun sensor data acquisition, and an NXP i.MX RT1060 microcontroller. This microcontroller replaces programmable logic devices (PLDs) used in earlier designs, streamlining integration and enhancing functionality. Comprehensive integration and stress testing on a custom-built testbed confirmed the board’s electrical and mechanical stability, validating its readiness for environmental qualification. The backplane significantly reduces cable complexity, improves subsystem modularity, and provides a scalable foundation for future CubeSat missions.
