Session
Poster Session 1
Location
Salt Palace Convention Center, Salt Lake City, UT
Abstract
This document discusses the development of a system to reprogram an FPGA that is located on a satellite in orbit. The new image for the FPGA will be telemetered to the satellite and passed as command data to the subsystem containing the FPGA. The method for reprogramming is robust, verifies that the FPGA image was not corrupted during transmission, and does not rely on the current image or functionality of the FPGA.
Small satellites use Field Programmable Gate Arrays (FPGAs) to interface with the satellite computer and other instruments such as cameras and sensors. These FPGAs are traditionally programmed on the ground through a dedicated communication port before the satellite is sent into orbit. The ability to reprogram an FPGA on a satellite that is in orbit requires additional technology that has not been commonly developed or used on past CubeSat missions. Successful design, testing, and implementation of this technology for CubeSats could extend operational life, protect against cyber threats, add new capabilities in-orbit, and eliminate risk for missions by correcting problems after launch.
Every FPGA family has its own requirements for reprogramming. Previous methods that have been used to reprogram Xilinx FPGAs remotely have used x86 microprocessors. These methods have many drawbacks. The on-board SRAM loses all of its data after being powered down, and x86 microprocessors draw more power than ARM microprocessors. The FPGAs that are used by the Center for Space Engineering at USU are PolarFire FPGAs produced by Microchip.1 These are very low power FPGAs that are radiation tolerant. The ability to reprogram a PolarFire FPGA for CubeSats has not been developed at USU and is not common within the small satellite community.
This paper outlines the systems tested and the processes employed for creating various custom designed Printed Circuit Boards (PCBs) with a secondary FPGA or an ARM based microprocessor. There are various ways to accomplish this including connecting to an on-board SPI flash memory that will interface with a PolarFire FPGA.2 Another way would be to connect the secondary FPGA or microprocessor directly to the PolarFire FPGA reprogramming port.3 Either design will receive command packets from ground control, store an updated program in local memory, and load the updated image onto the FPGA on the next power up cycle. Using SPI flash and an FPGA or an ARM microprocessor will be better than previous implementations because all components will have radiation hardened versions, low power draw, and will robustly verify or report status of reprogramming via CCSDS packets. There are many applications for this project that will help the team at the Center for Space Engineering as well as the entire CubeSat community.
Document Type
Event
In-Orbit Reprogramming of Satellite’s FPGAs
Salt Palace Convention Center, Salt Lake City, UT
This document discusses the development of a system to reprogram an FPGA that is located on a satellite in orbit. The new image for the FPGA will be telemetered to the satellite and passed as command data to the subsystem containing the FPGA. The method for reprogramming is robust, verifies that the FPGA image was not corrupted during transmission, and does not rely on the current image or functionality of the FPGA.
Small satellites use Field Programmable Gate Arrays (FPGAs) to interface with the satellite computer and other instruments such as cameras and sensors. These FPGAs are traditionally programmed on the ground through a dedicated communication port before the satellite is sent into orbit. The ability to reprogram an FPGA on a satellite that is in orbit requires additional technology that has not been commonly developed or used on past CubeSat missions. Successful design, testing, and implementation of this technology for CubeSats could extend operational life, protect against cyber threats, add new capabilities in-orbit, and eliminate risk for missions by correcting problems after launch.
Every FPGA family has its own requirements for reprogramming. Previous methods that have been used to reprogram Xilinx FPGAs remotely have used x86 microprocessors. These methods have many drawbacks. The on-board SRAM loses all of its data after being powered down, and x86 microprocessors draw more power than ARM microprocessors. The FPGAs that are used by the Center for Space Engineering at USU are PolarFire FPGAs produced by Microchip.1 These are very low power FPGAs that are radiation tolerant. The ability to reprogram a PolarFire FPGA for CubeSats has not been developed at USU and is not common within the small satellite community.
This paper outlines the systems tested and the processes employed for creating various custom designed Printed Circuit Boards (PCBs) with a secondary FPGA or an ARM based microprocessor. There are various ways to accomplish this including connecting to an on-board SPI flash memory that will interface with a PolarFire FPGA.2 Another way would be to connect the secondary FPGA or microprocessor directly to the PolarFire FPGA reprogramming port.3 Either design will receive command packets from ground control, store an updated program in local memory, and load the updated image onto the FPGA on the next power up cycle. Using SPI flash and an FPGA or an ARM microprocessor will be better than previous implementations because all components will have radiation hardened versions, low power draw, and will robustly verify or report status of reprogramming via CCSDS packets. There are many applications for this project that will help the team at the Center for Space Engineering as well as the entire CubeSat community.
