Session

Weekend Poster Session 2

Location

Utah State University, Logan, UT

Abstract

The Multiview Onboard Computational Imager (MOCI) built by the University of Georgia’s Small Satellite Research Lab (SSRL) will be one of the first small satellites to include a small form factor graphics processing unit (GPU), the NVIDIA TX2i, in its design and therefore includes three onboard computers that will need to coordinate and interchange data to successfully complete the mission. The Onboard Computer (OBC), standard for most satellite systems, will coordinate most system controls. The GPU serves as the onboard payload manager and bulk data processor and coordinates with the attitude determination and control system (ADCS) to collect all necessary data for processing. These computers will communicate through hardware lines using two different serial protocols. In this paper, we propose a control system which synchronizes system clocks and transfers data efficiently through the differing serial protocols in order to process data without any bottlenecks in the data transfer or a decrease in accuracy between the data and its matching telemetry. The success of all these components working together will serve as a proof of concept for GPUs, like the TX2i, onboard small satellites and giving birth to future onboard computational imagers like MOCI.

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Aug 7th, 10:15 AM

Co-Operating Systems: A Technical Overview of Multiple Onboard Operating Systems

Utah State University, Logan, UT

The Multiview Onboard Computational Imager (MOCI) built by the University of Georgia’s Small Satellite Research Lab (SSRL) will be one of the first small satellites to include a small form factor graphics processing unit (GPU), the NVIDIA TX2i, in its design and therefore includes three onboard computers that will need to coordinate and interchange data to successfully complete the mission. The Onboard Computer (OBC), standard for most satellite systems, will coordinate most system controls. The GPU serves as the onboard payload manager and bulk data processor and coordinates with the attitude determination and control system (ADCS) to collect all necessary data for processing. These computers will communicate through hardware lines using two different serial protocols. In this paper, we propose a control system which synchronizes system clocks and transfers data efficiently through the differing serial protocols in order to process data without any bottlenecks in the data transfer or a decrease in accuracy between the data and its matching telemetry. The success of all these components working together will serve as a proof of concept for GPUs, like the TX2i, onboard small satellites and giving birth to future onboard computational imagers like MOCI.